HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 374

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Timer Pulse Unit (TPU)
The correspondence between PWM output pins and registers is shown in table 9.6.
Table 9.6
Channel
0
1
2
Note: In PWM mode 2, PWM output is not possible for the TGR register in which the period is set.
Rev.3.00 Mar. 26, 2007 Page 332 of 772
REJ09B0355-0300
PWM mode 1
PWM output is generated from the TIOCA and TIOCC pins by pairing TGRA with TGRB and
TGRC with TGRD. The output specified by bits IOA3 to IOA0 and IOC3 to IOC0 in TIOR is
output from the TIOCA and TIOCC pins at compare matches A and C, and the output
specified by bits IOB3 to IOB0 and IOD3 to IOD0 in TIOR is output at compare matches B
and D. The initial output value is the value set in TGRA or TGRC. If the set values of paired
TGRs are identical, the output value does not change when a compare match occurs.
In PWM mode 1, a maximum 4-phase PWM output is possible.
PWM mode 2
PWM output is generated using one TGR as the cycle register and the others as duty registers.
The output specified in TIOR is performed by means of compare matches. Upon counter
clearing by a synchronization register compare match, the output value of each pin is the initial
value set in TIOR. If the set values of the cycle and duty registers are identical, the output
value does not change when a compare match occurs.
In PWM mode 2, a maximum 7-phase PWM output is possible by combined use with
synchronous operation.
PWM Output Registers and Output Pins
Registers
TGR0A
TGR0B
TGR0C
TGR0D
TGR1A
TGR1B
TGR2A
TGR2B
PWM Mode 1
TIOCA0
TIOCC0
TIOCA1
TIOCA2
Output Pins
PWM Mode 2
TIOCA0
TIOCB0
TIOCC0
TIOCD0
TIOCA1
TIOCB1
TIOCA2
TIOCB2