HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 245

no-image

HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6412240FA13
Manufacturer:
HITACHI
Quantity:
8 831
Part Number:
HD6412240FA13V
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD6412240FA20
Manufacturer:
HITACHI
Quantity:
12 388
Part Number:
HD6412240FA20V
Manufacturer:
LT
Quantity:
3 220
Part Number:
HD6412240FA20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6412240TE13
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6412240TE13
Quantity:
33
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS
Quantity:
15 090
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
7.3.11
Activation by Interrupt
The procedure for using the DTC with interrupt activation is as follows:
[1] Set the MRA, MRB, SAR, DAR, CRA, and CRB register information in the on-chip RAM.
[2] Set the start address of the register information in the DTC vector address.
[3] Set the corresponding bit in DTCER to 1.
[4] Set the enable bits for the interrupt sources to be used as the activation sources to 1. The DTC
[5] After the end of one data transfer, or after the specified number of data transfers have ended,
Activation by Software
The procedure for using the DTC with software activation is as follows:
[1] Set the MRA, MRB, SAR, DAR, CRA, and CRB register information in the on-chip RAM.
[2] Set the start address of the register information in the DTC vector address.
[3] Check that the SWDTE bit is 0.
[4] Write 1 to SWDTE bit and the vector number to DTVECR.
[5] Check the vector number written to DTVECR.
[6] After the end of one data transfer, if the DISEL bit is 0 and a CPU interrupt is not requested,
is activated when an interrupt used as an activation source is generated.
the DTCE bit is cleared to 0 and a CPU interrupt is requested. If the DTC is to continue
transferring data, set the DTCE bit to 1.
the SWDTE bit is cleared to 0. If the DTC is to continue transferring data, set the SWDTE bit
to 1. When the DISEL bit is 1, or after the specified number of data transfers have ended, the
SWDTE bit is held at 1 and a CPU interrupt is requested.
Procedures for Using DTC
Rev.3.00 Mar. 26, 2007 Page 203 of 772
Section 7 Data Transfer Controller
REJ09B0355-0300

Related parts for HD6412240