HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 455

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): These bits select the clock source for the
baud rate generator. The clock source can be selected from , /4, /16, and /64, according to the
setting of bits CKS1 and CKS0.
For the relation between the clock source, the bit rate register setting, and the baud rate, see
section 12.2.8, Bit Rate Register (BRR).
12.2.6
SCR is a register that performs enabling or disabling of SCI transfer operations, serial clock output
in asynchronous mode, and interrupt requests, and selection of the serial clock source.
SCR can be read or written to by the CPU at all times.
SCR is initialized to H'00 by a reset, and in standby mode or module stop mode.
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit data empty interrupt
(TXI) request generation when serial transmit data is transferred from TDR to TSR and the TDRE
flag in SSR is set to 1.
Note:
Bit 1
CKS1
0
1
Bit 7
TIE
0
1
Bit
Initial value
R/W
* TXI interrupt request cancellation can be performed by reading 1 from the TDRE flag,
Serial Control Register (SCR)
then clearing it to 0, or clearing the TIE bit to 0.
Bit 0
CKS0
0
1
0
1
Description
Transmit data empty interrupt (TXI) requests disabled*
Transmit data empty interrupt (TXI) requests enabled
:
:
:
R/W
TIE
7
0
Description
/4 clock
/16 clock
/64 clock
clock
R/W
RIE
6
0
R/W
TE
5
0
Section 12 Serial Communication Interface (SCI)
R/W
RE
4
0
Rev.3.00 Mar. 26, 2007 Page 413 of 772
MPIE
R/W
3
0
TEIE
R/W
2
0
CKE1
REJ09B0355-0300
R/W
1
0
(Initial value)
(Initial value)
CKE0
R/W
0
0

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