HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 490

no-image

HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6412240FA13
Manufacturer:
HITACHI
Quantity:
8 831
Part Number:
HD6412240FA13V
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD6412240FA20
Manufacturer:
HITACHI
Quantity:
12 388
Part Number:
HD6412240FA20V
Manufacturer:
LT
Quantity:
3 220
Part Number:
HD6412240FA20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6412240TE13
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6412240TE13
Quantity:
33
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS
Quantity:
15 090
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 12 Serial Communication Interface (SCI)
In serial transmission, the SCI operates as described below.
[1] The SCI monitors the TDRE flag in SSR, and if is 0, recognizes that data has been written to
[2] After transferring data from TDR to TSR, the SCI sets the TDRE flag to 1 and starts
[3] The SCI checks the TDRE flag at the timing for sending the stop bit.
Rev.3.00 Mar. 26, 2007 Page 448 of 772
REJ09B0355-0300
TDR, and transfers the data from TDR to TSR.
transmission.
If the TIE bit is set to 1 at this time, a transmit data empty interrupt (TXI) request is generated.
The serial transmit data is sent from the TxD pin in the following order.
[a] Start bit:
[b] Transmit data:
[c] Multiprocessor bit
[d] Stop bit(s):
[e] Mark state:
If the TDRE flag is cleared to 0, data is transferred from TDR to TSR, the stop bit is sent, and
then serial transmission of the next frame is started.
If the TDRE flag is set to 1, the TEND flag in SSR is set to 1, the stop bit is sent, and then the
mark state is entered in which 1 is output continuously. If the TEIE bit in SCR is set to 1 at this
time, a transmission end interrupt (TEI) request is generated.
One 0-bit is output.
8-bit or 7-bit data is output in LSB-first order.
One multiprocessor bit (MPBT value) is output.
One or two 1-bits (stop bits) are output.
1 is output continuously until the start bit that starts the next transmission is sent.

Related parts for HD6412240