HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 21

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

13.2.2 Serial Status
Register (SSR)
13.3.4 Register Settings 486
13.3.6 Data Transfer
Operations
Item
479
495
496
497
Page Revision (See Manual for Details)
Note * added
Notes: etu: ...
* DTC can clear this bit only when DISEL is 0 with the transfer
counter not being 0.
SCR Setting
Description amended
... When the GM bit in SMR is cleared to 0, set these bits to B'00
if a clock is not to be output, or to B'01 if a clock is to be output.
...
Fixing Clock Output Level
Description amended
When the GM bit in SMR is set to 1, ... In this example, GM is set
to 1, ...
Data Transfer Operation by DTC
Description amended
... If the TXI request is designated beforehand as a DTC
activation source, the DTC will be activated by the TXI request,
and transfer of the transmit data will be carried out. When DISEL
in DTC is 0 and the transfer counter value is not 0, the TDRE and
TEND flags are automatically cleared to 0 when data transfer is
performed. If DISEL is 1, or if DISEL is 0 and the transfer counter
value is 0, the DTC writes the transfer data to TDR but does not
clear the flags. Therefore, the flags should be cleared by the
CPU. In the event of an error, the SCI retransmits the same data
automatically. The TEND flag remains cleared to 0 during this
time, and the DTC is not activated. Thus, the number of bytes
specified by the SCI and DTC are transmitted automatically even
in retransmission following an error. However, the ERS flag is not
cleared ...
... If the RXI request is designated beforehand as a DTC
activation source, the DTC will be activated by the RXI request,
and transfer of the receive data will be carried out. At this time,
the RDRF flag is cleared to 0 if DISEL in DTC is 0 and the
transfer counter value is not 0. If DISEL is 1, or if DISEL is 0 and
the transfer counter value is 0, the DTC transfers the receive
data but does not clear the flag. Therefore, the flag should be
cleared by the CPU. If an error occurs, an error flag is set but the
RDRF flag is not.
Rev.3.00 Mar. 26, 2007 Page xxi of xlii
REJ09B0355-0300