HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 32

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 6 Bus Controller
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
Rev.3.00 Mar. 26, 2007 Page xxxii of xlii
REJ09B0355-0300
Overview........................................................................................................................... 131
6.1.1
6.1.2
6.1.3
6.1.4
Register Descriptions ........................................................................................................ 135
6.2.1
6.2.2
6.2.3
6.2.4
6.2.5
Overview of Bus Control .................................................................................................. 145
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
Basic Timing..................................................................................................................... 150
6.4.1
6.4.2
6.4.3
Basic Bus Interface ........................................................................................................... 153
6.5.1
6.5.2
6.5.3
6.5.4
6.5.5
Burst ROM Interface......................................................................................................... 166
6.6.1
6.6.2
6.6.3
Idle Cycle.......................................................................................................................... 169
6.7.1
6.7.2
Bus Release....................................................................................................................... 172
6.8.1
6.8.2
6.8.3
6.8.4
Features................................................................................................................ 131
Block Diagram..................................................................................................... 132
Pin Configuration................................................................................................. 133
Register Configuration......................................................................................... 134
Bus Width Control Register (ABWCR)............................................................... 135
Access State Control Register (ASTCR) ............................................................. 136
Wait Control Registers H and L (WCRH, WCRL).............................................. 137
Bus Control Register H (BCRH) ......................................................................... 141
Bus Control Register L (BCRL) .......................................................................... 143
Area Partitioning.................................................................................................. 145
Bus Specifications................................................................................................ 146
Memory Interfaces............................................................................................... 147
Advanced Mode................................................................................................... 148
Areas in Normal Mode ........................................................................................ 149
Chip Select Signals .............................................................................................. 150
On-Chip Memory (ROM, RAM) Access Timing ................................................ 151
On-Chip Peripheral Module Access Timing........................................................ 152
External Address Space Access Timing .............................................................. 153
Overview.............................................................................................................. 153
Data Size and Data Alignment............................................................................. 153
Valid Strobes........................................................................................................ 155
Basic Timing........................................................................................................ 156
Wait Control ........................................................................................................ 164
Overview.............................................................................................................. 166
Basic Timing........................................................................................................ 166
Wait Control ........................................................................................................ 168
Operation ............................................................................................................. 169
Pin States in Idle Cycle ........................................................................................ 172
Overview.............................................................................................................. 172
Operation ............................................................................................................. 172
Pin States in External Bus Released State............................................................ 173
Transition Timing ................................................................................................ 174
................................................................................................... 131