HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 309

• Manufacturer Part Number: HD6412240
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores output data for the port E pins (PE
PEDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port E Register (PORTE)
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port E pins (PE
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E
read is performed while PEDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTE contents are determined by the pin
states, as PEDDR and PEDR are initialized. PORTE retains its prior state after a manual reset, and
in software standby mode.
Bit
Initial value
R/W
Note: * Determined by state of pins PE
Bit
Initial value
R/W
Modes 3 and 7
Setting a PEDDR bit to 1 makes the corresponding port E pin an output port, while clearing the
bit to 0 makes the pin an input port.
Note: Modes 3 and 7 cannot be used in the H8S/2240.
:
:
:
:
:
:
PE7DR
R/W
PE7
—*
7
0
R
7
PE6DR
R/W
PE6
—*
6
0
R
6
7
to PE
PE5DR
R/W
PE5
—*
0
R
5
0
5
) must always be performed on PEDR.
7
to PE
PE4DR
0
R/W
PE4
.
—*
4
0
R
4
Rev.3.00 Mar. 26, 2007 Page 267 of 772
PE3DR
R/W
PE3
—*
3
0
R
3
PE2DR
R/W
PE2
—*
2
0
R
2
PE1DR
Section 8 I/O Ports
R/W
PE1
REJ09B0355-0300
—*
R
1
0
1
PE0DR
7
R/W
PE0
to PE
—*
0
0
R
0
0
).