HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 22

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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13.4 Usage Notes
14.1.1 Features
14.2.2 A/D
Control/Status Register
(ADCSR)
14.4.1 Single Mode
(SCAN = 0)
Figure 14.3 Example of
A/D Converter Operation
(Single Mode, Channel 1
Selected)
Rev.3.00 Mar. 26, 2007 Page xxii of xlii
REJ09B0355-0300
Item
500
501
503
508
509
514
Page Revision (See Manual for Details)
Retransfer Operation
Description amended
[4] ... If DTC data transfer by an RXI source is enabled, the
contents of RDR can be read automatically. When the RDR data
is read by the DTC, the RDRF flag is automatically cleared to 0 if
DISEL in DTC is 0 and the transfer counter value is not 0.
[9] ... If DTC data transfer by an RXI source is enabled, the
contents of RDR can be read automatically. When data is written
to TDR by the DTC, the TDRE bit is automatically cleared to 0 if
DISEL in DTC is 0 and the transfer counter value is not 0.
Description amended
Bit 7 A/D End Flag (ADF)
Note * added
[Clearing conditions]
Note: * The flag is cleared only when DISEL in DTC is 0 and the
transfer counter value is not 0.
Bit 3 Clock Select (CKS)
Description added
... is stopped (ADST = 0). Set the conversion time to a value
equal to or greater than the conversion time indicated in section
19.5, A/D Conversion Characteristics.
Note * added to figure 14.3
Read conversion result*
Retransfer operation when SCI is in receive mode
Retransfer operation when SCI is in transmit mode
High-speed conversion
When 0 is written to ...
When the DTC* is activated by a ADI interrupt and ADDR is
read
Minimum conversion time: 6.5 s per channel (at 20-MHz
operation)

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