HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 290

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HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 8 I/O Ports
8.8.2
Table 8.13 shows the port B register configuration.
Table 8.13 Port B Registers
Name
Port B data direction register
Port B data register
Port B register
Port B MOS pull-up control register
Note:
Port B Data Direction Register (PBDDR)
PBDDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port B. PBDDR cannot be read; if it is, an undefined value will be read.
This register is a write-only register, and cannot be written by bit manipulation instruction. For
details, see section 2.10.4, Access Methods for Registers with Write-Only Bits.
PBDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its
prior state after a manual reset, and in software standby mode. The OPE bit in SBYCR is used to
select whether the address output pins retain their output state or become high-impedance when a
transition is made to software standby mode.
Rev.3.00 Mar. 26, 2007 Page 248 of 772
REJ09B0355-0300
Bit
Initial value
R/W
Modes 1, 4, and 5
The corresponding port B pins are address outputs irrespective of the value of the PBDDR bits.
Modes 2 and 6
Setting a PBDDR bit to 1 makes the corresponding port B pin an address output, while
clearing the bit to 0 makes the pin an input port.
Note: Modes 2 and 6 cannot be used in the H8S/2240.
* Lower 16 bits of the address.
Register Configuration
:
:
:
PB7DDR
W
7
0
PB6DDR
W
6
0
PB5DDR
PBDDR
PBDR
PBPCR
Abbreviation
PORTB
W
5
0
PB4DDR
W
4
0
PB3DDR
R/W
W
R/W
R
R/W
W
3
0
Initial Value
H'00
H'00
Undefined
H'00
PB2DDR
W
2
0
PB1DDR
W
1
0
H'FEBA
Address*
H'FF6A
H'FF5A
H'FF71
PB0DDR
W
0
0

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