HD6412240 RENESAS [Renesas Technology Corp], HD6412240 Datasheet - Page 405

no-image

HD6412240

Manufacturer Part Number
HD6412240
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2200 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6412240FA13
Manufacturer:
HITACHI
Quantity:
8 831
Part Number:
HD6412240FA13V
Manufacturer:
HITACHI/日立
Quantity:
20 000
Part Number:
HD6412240FA20
Manufacturer:
HITACHI
Quantity:
12 388
Part Number:
HD6412240FA20V
Manufacturer:
LT
Quantity:
3 220
Part Number:
HD6412240FA20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6412240TE13
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6412240TE13
Quantity:
33
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS
Quantity:
15 090
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS
Quantity:
1 000
Part Number:
HD6412240TE13V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.1
The H8S/2245 Group includes an 8-bit timer module with two channels (TMR0 and TMR1). Each
channel has an 8-bit counter (TCNT) and two time constant registers (TCORA and TCORB) that
are constantly compared with the TCNT value to detect compare match events. The 8-bit timer
module can thus be used for a variety of functions, including pulse output with an arbitrary duty
cycle.
10.1.1
Selection of four clock sources
The counters can be driven by one of three internal clock signals ( /8, /64, or /8192) or an
external clock input (enabling use as an external event counter).
Selection of three ways to clear the counters
The counters can be cleared on compare match A or B, or by an external reset signal.
Timer output control by a combination of two compare match signals
The timer output signal in each channel is controlled by a combination of two independent
compare match signals, enabling the timer to generate output waveforms with an arbitrary duty
cycle or PWM output.
Provision for cascading of two channels
Three independent interrupts
Compare match A and B and overflow interrupts can be requested independently.
Module stop mode can be set
Operation as a 16-bit timer is possible, using channel 0 for the upper 8 bits and channel 1
for the lower 8 bits (16-bit count mode).
Channel 1 can be used to count channel 0 compare matches (compare match count mode).
As the initial setting, 8-bit timer operation is halted. Register access is enabled by exiting
module stop mode.
Overview
Features
Section 10 8-Bit Timers
Rev.3.00 Mar. 26, 2007 Page 363 of 772
Section 10 8-Bit Timers
REJ09B0355-0300

Related parts for HD6412240