PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 140

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 071h (IADDR = 8h): WPP Generator STS-1 path Configuration
This register contains the definition of the WPP Indirect Data register (Register 071h) when
accessing Indirect Address 8h (IADDR[3:0] is “8h” in register 070h).
For STS-Nc rates, only the first STS-1 has to be configured.
INV_PRBS
FORCE_ERR
SEQ_PRBSB
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sets the generator to invert the PRBS before inserting it in the payload. When set high, the
PRBS bytes will be inverted, else they will be inserted unmodified.
The Force Error bit is used to force bit errors in the inserted pattern. When a logic one is
written, the MSB of the next byte will be inverted, inducing a single bit error. The register
clears itself when the operation is complete.
This bit enables the insertion of a PRBS sequence or a sequential pattern in the payload.
When low, the payload is filled with PRBS bytes, and when high, a sequential pattern is
inserted.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R/W
R/W
LINKENA
Reserved
LINKENA
Reserved
Reserved
SEQ_PRBSB
Reserved
FORCE_ERR
INV_PRBS
Reserved
Function
Unused
Unused
Reserved
Unused
Unused
Unused
SBSLITE™ Telecom Standard Product Data Sheet
Default
X
X
0
0
X
X
0
0
0
0
0
0
0
0
0
Preliminary
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