PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 6

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
List of Figures
Figure 1 OC-48 T1/E1 ADM (Individually Drop/Add any T1/E1 in STS-48)....................13
Figure 2 OC-48 T1/E1 ADM (Drop/Add up to STS-48 at STS-1 Granularity) .................13
Figure 3 Any-Service-Any-Port NxDS0 TDM Access Solution........................................14
Figure 4 Any-Service-Any-Port T1/E1 Channelized PHY Card.......................................14
Figure 5 SBSLITE Block Diagram ...................................................................................15
Figure 6 Loopback Block Diagram ..................................................................................16
Figure 7 Pin Diagram (Bottom View)...............................................................................19
Figure 8 Character Alignment State Machine .................................................................60
Figure 9 Frame Alignment State Machine.......................................................................62
Figure 10 In-Band Signaling Channel Message Format .................................................64
Figure 11 In-Band Signaling Channel Header Format ....................................................65
Figure 12 Input Observation Cell (IN_CELL) ................................................................252
Figure 13 Output Cell (OUT_CELL) ..............................................................................252
Figure 14 Bidirectional Cell (IO_CELL) .........................................................................253
Figure 15 Layout of Output Enable and Bidirectional Cells...........................................253
Figure 16 “C1” Synchronization Control ........................................................................255
Figure 17 TEMUX-84™/SBSLITE™/NSE/SBSLITE™/AAL1gator-32™ system
Figure 18 CAS Multiframe Timing .................................................................................257
Figure 19 Switch Timing DSOs with CAS .....................................................................257
Figure 20 TEMUX-84/SBSLITE/NSE/SBSLITE/FREEDM-336 System DS0
Figure 21 Switch Timing - DSOs without CAS ..............................................................259
Figure 22 Non DS0 Switch Timing ................................................................................260
Figure 23 Example Graph .............................................................................................262
Figure 24 Time:Space:Time Switching in one NSE-20G and four Single-Ported
Figure 25 Example Graph .............................................................................................264
Figure 26 Example Problem..........................................................................................265
Figure 27 Merged Graph ...............................................................................................265
Figure 28 Relabeled Graph ...........................................................................................266
Figure 29 Boundary Scan Architecture .........................................................................268
Figure 30 TAP Controller Finite State Machine.............................................................269
Figure 31 Incoming SBI336 Functional Timing .............................................................272
Figure 32 Incoming 77 MHz TelecomBus Functional Timing .......................................274
DS0 Switching with CAS...............................................................................256
Switching no CAS .........................................................................................258
SBSs .............................................................................................................263
SBSLITE™ Telecom Standard Product Data Sheet
Preliminary
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