PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 231

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 0CBH: RP8D Analog Control
This register controls the PDRU and RPLV analog blocks. Please refer to their respective
documents for a description of the functionality of these bits.
NOTE: THIS REGISTER MUST BE SET TO CC34h FOR PROPER OPERATION OF
THE RP8D BLOCK. FOR DISABLING THIS RECEIVER, THIS REGISTER SHOULD
BE SET TO F834H
DRU_ENB
RX_ENB
ARSTB
Reserved
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Setting this bit high will disable the PDRU.
Setting this bit high will disable the RPLV.
Setting this bit low will reset the PDRU and RPLV blocks.
The Reserved bits should be set as described above.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DRU_ENB
RX_ENB
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Function
Reserved
Reserved
Reserved
Reserved
Unused
SBSLITE™ Telecom Standard Product Data Sheet
Default
1
1
0
0
0
1
0
0
0
0
0
0
0
0
0
X
Preliminary
230