PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 156

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 081h: PPP Indirect Data
This register contains the data read from the internal RAM after an indirect read operation or the
data to be inserted into the internal RAM in an indirect write operation.
DATA[15:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The indirect access data (DATA[15:0]) bits hold the data transfer to or from the internal RAM
during indirect access. When RDWRB is set to logic one (indirect read), the data from the
addressed location in the internal RAM will be transfer to DATA[15:0]. BUSY should be
polled to determine when the new data is available in DATA[15:0]. When RDWRB is set to
logic zero (indirect write), the data from DATA[15:0] will be transferred to the addressed
location in the internal RAM. The indirect Data register must contain valid data before the
indirect write is initiated by writing to the Indirect Address Register.
DATA[15:0] has a different meaning depending on which page of the internal RAM is being
accessed.
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
DATA[9]
DATA[8]
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
DATA[1]
DATA[0]
Function
DATA[15]
DATA[14]
DATA[13]
DATA[12]
DATA[11]
DATA[10]
SBSLITE™ Telecom Standard Product Data Sheet
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Preliminary
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