PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 161

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 081h (IADDR = 4h): PPP Monitor Error count
This register contains the definition of the PPP Indirect Data register (Register 061h) when
accessing Indirect Address 4h (IADDR[3:0] is “4h” in register 060h).
ERR_CNT[15:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The ERR_CNT[15:0] register contains the cumulative number of errors in the PRBS bytes
since the last error reporting event. Errors are accumulated only when the monitor is in the
synchronized state. Each PRBS byte will only contribute a single error, even if there are
multiple errors within a single PRBS byte. The transfer of the error counter to this holding
register is triggered by an indirect write to this register or by writing the SBSLITE Master
Signal Monitor #1, Accumulation Trigger Register (014H). The error counter is cleared and
restarted after its value is transferred to the ERR_CNT[15:0] holding register. No errors are
missed during the transfer. The error counter will not wrap around after reaching FFFFh, it
will saturate at this value.
Type
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
ERR_CNT[15]
ERR_CNT[14]
ERR_CNT[13]
ERR_CNT[12]
ERR_CNT[11]
ERR_CNT[10]
ERR_CNT[9]
ERR_CNT[8]
ERR_CNT[7]
ERR_CNT[6]
ERR_CNT[5]
ERR_CNT[4]
ERR_CNT[3]
ERR_CNT[2]
ERR_CNT[1]
ERR_CNT[0]
Function
SBSLITE™ Telecom Standard Product Data Sheet
Default
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Preliminary
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