PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 45

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

10.1.7
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Table 11 E1 Channel Associated Signaling Bits
E1 tributary asynchronous timing is compensated via the V3 octet as described in section 10.1.2.
E1 tributary link rate adjustments are optionally passed across the SBI via the V4 octet as
described in section 10.1.3. E1 tributary alarm conditions are optionally passed across the SBI
bus via the link rate octet in the V4 location as described in Sections 10.1.3 and 10.1.4.
The SBI bus allows for a synchronous E1 mode of operation. In this mode the E1 tributary
mapping is fixed to that shown in Table 10 and rate justifications are not possible using the V3
octet. The clock rate information within the link rate octet in the V4 location is not used in
synchronous mode.
DS3 Tributary Mapping
Table 12 shows a DS3 tributary mapped within the first SPE, SPE1. The V5 indicator pulse
identifies the V5 octet. The DS3 framing format does not follow an 8 KHz frame period so the
floating DS3 multi-frame located by the V5 indicator, shown in heavy border grey region in Table
12, will jump around relative to the H1 frame on every pass. In fact the V5 indicator will often be
asserted twice per H1 frame, as is shown by the second V5 octet in Table 12. The V5 indicator
and payload signals indicate negative and positive rate adjustments which are carried out by
either putting a data byte in the H3 octet or leaving empty the octet after the H3 octet.
TS#16[7:4]
RRRR
ABCD1
ABCD2
ABCD3
ABCD4
ABCD5
ABCD6
ABCD7
ABCD8
ABCD9
ABCD10
ABCD11
ABCD12
ABCD13
ABCD14
ABCD15
TS#16[3:0]
RRRR
ABCD16
ABCD17
ABCD18
ABCD19
ABCD20
ABCD21
ABCD22
ABCD23
ABCD24
ABCD25
ABCD26
ABCD27
ABCD28
ABCD29
ABCD30
PP
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
C0
SBSLITE™ Telecom Standard Product Data Sheet
Preliminary
44