PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 213

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 0B8H: TP8E Control and Status
This register provides control and reports the status of the TP8E.
DLCV
CENTER
TPINS
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The diagnose line code violation bit (DLCV) controls the insertion of line code violation in
the protection transmit serial data stream. When this bit is set high, the encoded data is
inverted to generate the complementary running disparity.
The FIFO centering control bit (CENTER) controls the separation of the FIFO read and write
pointers. CENTER is a write only bit. When a logic high is written to CENTER, and the
current FIFO depth is not in the range of 3, 4 or 5 characters, the FIFO depth is forced to be
four 8B/10B characters deep, with a momentary data corruption. Writing to the CENTER bit
when the FIFO depth is in the 3, 4 or 5 character range produces no effect. CENTER always
returns a logic low when read.
This bit must be set once CSU lock has been achieved.
The Test Pattern Insertion (TPINS) controls the insertion of test pattern in the protection
transmit serial data stream for jitter testing purpose. When this bit is set high, the test pattern
stored in the registers (TP[9:0]) is used to replace all the overhead and payload bytes of the
transmit data stream. When TPINS is set low, no test pattern is inserted.
Type
R/W
R/W
R/W
W
R/W
R/W
Reserved
FIFOERRE
TPINS
Reserved
CENTER
DLCV
Function
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
Unused
SBSLITE™ Telecom Standard Product Data Sheet
Default
X
X
X
X
X
X
X
X
X
X
0
0
0
0
0
0
Preliminary
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