PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 277

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PM8611-BIAP

Manufacturer Part Number
PM8611-BIAP
Description
Manufacturer
PMC [PMC-Sierra, Inc]
Datasheet
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Figure 35 Receive LVDS Link Timing
Figure 36 shows the timing relationships around the RC1FP signal. The Outgoing Memory Page
selection signal (OCMP) and the Receive Working Serial Data Select signal (RWSEL) are only
valid at the SYSCLK cycle located by RC1FP. They are ignored at all other locations within the
transport frame. The delay from RC1FP is to the J0 byte on the outgoing SBI or TelecomBus
stream is the sum of the value programmed into the RC1FPDLY[13:0] register and processing
delay of 18 SYSCLK cycles.
Figure 36 Outgoing Synchronization Timing
ODATA[7:0]
RNPROT/
RNWRK/
SYSCLK
RPPROT
RPWRK
RC1FP
SYSCLK
RWSEL
OC1FP
RC1FP
OCMP
OPL
X
X
Vaild
Vaild
RC1FPDLY[13:0] + 18
...
...
X
X
Delay to First J0
Delay to Last J0
S3,3 / A2
SBSLITE™ Telecom Standard Product Data Sheet
S3,3
A2
S4,3 / A2
S4,3
A2
S1,1
J0
S2,1
Z0
S3,1
Z0
X
X
S4,1
Z0
S4,4 / A2
S1,2
Z0
S1,1 / J0
S2,2
Z0
S3,2
Z0
S4,2
Z0
S1,3
Z0
S2,3
Z0
S3,3
Z0
S1,1 / J0
Preliminary
S4,3
Z0
S2,1 / Z0
B522
S1,1
X
X
B522
S2,1
276
B522
S3,1

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