PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 203

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 0ADH: PILC Interrupt Enable and Control Register.
OUSER0_CHGE
OPAGE_CHGE[1:0]
RX_LINK_CHGE
RX_OVFLWE
RX_THRSHLDE
RX_TIMEOUTE
Bit
Bit 15:13
Bit 12:11
Bit 10:8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2:1
Bit 0
Writing a logic one to the RX_OUSER0_CHGE bit enables the generation of an interrupt on
a change of state from a logic zero to a logic one of received message header bit OUSER[0].
Writing a logic one to the OPAGE_CHGE[n] bit enables the generation of an interrupt on a
change of state of the received PAGE bits. The OPAGE bits that changed value are indicated
by a logic one in the corresponding OPAGE_CHGI[n].
Writing a logic one to the RX_LINK_CHGE bit enables the generation of an interrupt on a
change of state of the received LINK bits. When either of the received LINK bits has changed
value the RX_LINK_CHGI bit will be set to a logic one.
Writing a logic one to the RX_OVFLWE bit enables the generation of an interrupt when
RX_OVFLWI is a logic one.
Writing a logic one to the RX_THRSHLDE bit enables the generation of an interrupt when
RX_THRSHLDI is a logic one.
Writing a logic one to the RX_TIMEOUTE bit enables the generation of an interrupt when
RX_TIMEOUTI is a logic one.
Type
R
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
RX_TIMEOUT_VAL[1:0]
RX_THRESHOLD_VAL[2:0]
RX_TIMEOUTE
RX_THRSHLDE
RX_OVFLWE
RX_LINK_CHGE
OPAGE_CHGE[1:0]
OUSER0_CHGE
Function
Unused
Unused
SBSLITE™ Telecom Standard Product Data Sheet
Default
000
00
101
0
0
0
0
0
00
0
Preliminary
202