PM8611-BIAP PMC [PMC-Sierra, Inc], PM8611-BIAP Datasheet - Page 154

• Manufacturer Part Number: PM8611-BIAP
• Manufacturer: PMC [PMC-Sierra, Inc]

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
Register 080h: PPP Indirect Address
This register provides selection of configuration pages and of the timeslots to be accessed in the
PPP block. Writing to this register triggers an indirect register access.
PATH[3:0]
IADDR[3:0]
Bit
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
The PATH[3:0] bits select which time-multiplexed division is accessed by the current indirect
transfer.
The internal RAM page bits select which page of the internal RAM is access by the current
indirect transfer. Six pages are defined for the monitor (IADDR[3] = ‘0’) : the configuration
page, the PRBS[22:7] page, the PRBS[6:0] page, the B1/E1 value page, the Monitor error
count page and the received B1/E1 byte.
Type
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IADDR[3:0]
0000
0001
0010
0011
PATH[3:0]
0000
0001-1100
1101-1111
BUSY
RDWRB
IADDR[3]
IADDR[2]
IADDR[1]
IADDR[0]
PATH[3]
PATH[2]
PATH[1]
PATH[0]
Function
Unused
Unused
Unused
Unused
Unused
Unused
RAM page
STS-1 path Configuration page
PRBS[22:7] page
PRBS[6:0] page
Reserved
Invalid STS-1 path
Invalid STS-1 path
time division #
STS-1 path #1 to STS-1
path #12
SBSLITE™ Telecom Standard Product Data Sheet
Default
0
0
X
X
X
X
0
0
0
0
X
X
0
0
0
0
Preliminary
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