S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 1082

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S912XET512J3VALR

Manufacturer Part Number
S912XET512J3VALR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET512J3VALR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12XE
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
S912XET512J3VALR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
28.3
This section describes the memory map and registers for the Flash module. Read data from unimplemented
memory space in the Flash module is undefined. Write access to unimplemented or reserved memory space
in the Flash module will be ignored by the Flash module.
28.3.1
The S12X architecture places the P-Flash memory between global addresses 0x74_0000 and 0x7F_FFFF
as shown in
The FPROT register, described in
accidental program or erase. Three separate memory regions, one growing upward from global address
0x7F_8000 in the Flash memory (called the lower region), one growing downward from global address
0x7F_FFFF in the Flash memory (called the higher region), and the remaining addresses in the Flash
memory, can be activated for protection. The Flash memory addresses covered by these protectable regions
are shown in the P-Flash memory map. The higher address region is mainly targeted to hold the boot loader
code since it covers the vector space. Default protection settings as well as security information that allows
the MCU to restrict access to the Flash module are stored in the Flash configuration field as described in
Table
1082
0x7F_FF00 – 0x7F_FF07
28-3.
Global Address
0x7F_FF0B
0x7F_FF08 –
0x7F_FF0C
0x7F_FF0D
Memory Map and Registers
Module Memory Map
Table
(2)
0x7C_0000 – 0x7F_FFFF
0x7A_0000 – 0x7B_FFFF
0x78_0000 – 0x79_FFFF
0x74_0000 – 0x77_FFFF
0x70_0000 – 0x73_FFFF
2
2
28-2. The P-Flash memory map is shown in
Global Address
(Bytes)
Size
8
4
1
1
MC9S12XE-Family Reference Manual Rev. 1.25
Table 28-2. P-Flash Memory Addressing
Table 28-3. Flash Configuration Field
Section
Backdoor Comparison Key
Refer to
Section 28.5.1, “Unsecuring the MCU using Backdoor Key
Reserved
P-Flash Protection byte
Refer to
EEE Protection byte
Refer to
28.3.2.9, can be set to protect regions in the Flash memory from
(Bytes)
256 K
128 K
128 K
256 K
256 K
Section 28.4.2.12, “Verify Backdoor Access Key
Section 28.3.2.9, “P-Flash Protection Register (FPROT)”
Section 28.3.2.10, “EEE Protection Register (EPROT)”
Size
P-Flash Block 0
Contains Flash Configuration Field
(see
P-Flash Block 1N
P-Flash Block 1S
P-Flash Block 2
No P-Flash Memory
Table
.
28-3)
Figure
Description
Description
(1)
28-2.
Command,” and
Freescale Semiconductor
Access”

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