S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 84

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S912XET512J3VALR

Manufacturer Part Number
S912XET512J3VALR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET512J3VALR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12XE
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XET512J3VALR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. 16 bits vector address based
2. For detailed description of XGATE channel ID refer to XGATE Block Guide
Chapter 1 Device Overview MC9S12XE-Family
Vector Address
1.6.3
When a reset occurs, MCU registers and control bits are initialized. Refer to the respective block
descriptions for register reset states.
On each reset, the Flash module executes a reset sequence to load Flash configuration registers and
initialize the buffer RAM EEE partition, if required.
1.6.3.1
On each reset, the Flash module will hold CPU activity while loading Flash module registers and
configuration from the Flash memory. The duration of this phase is given as t
parameter specification. If double faults are detected in the reset phase, Flash module protection and
security may be active on leaving reset. This is explained in more detail in the Flash module section.
1.6.3.2
During this phase of the reset sequence (following on from the core hold phase) the CPU can execute
instructions while the FTM initialization completes and, if configured for EEE operation, the EEE RAM
84
Vector base + $4C
Vector base + $3E
Vector base + $3C
Vector base + $3A
Vector base + $42
Vector base + $16
Vector base + $14
Vector base + $12
Vector base + $10
Vector base+ $4E
Vector base+ $4A
Vector base+ $48
Vector base+ $46
Vector base+ $44
Vector base+ $40
Vector base+ $18
to
Effects of Reset
Flash Configuration Reset Sequence (Core Hold Phase)
EEE Reset Sequence Phase (Core Active Phase)
(1)
Channel
XGATE
ID
$1E
$27
$26
$25
$24
$23
$22
$21
$20
$1F
(2)
Table 1-14. Interrupt Vector Locations (Sheet 4 of 4)
TIM Pulse accumulator A overflow
TIM Pulse accumulator input edge
MC9S12XE-Family Reference Manual Rev. 1.25
XGATE software error interrupt
System Call Interrupt (SYS)
ATD0 Compare Interrupt
ATD1 Compare Interrupt
TIM timer channel 3
TIM timer channel 4
TIM timer channel 5
TIM timer channel 6
TIM timer channel 7
TIM timer overflow
MPU Access Error
Spurious interrupt
Interrupt Source
Reserved
Mask
None
None
CCR
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
ATD0CTL2 (ACMPIE)
ATD1CTL2 (ACMPIE)
PACTL (PAOVI)
Local Enable
TSRC2 (TOF)
PACTL (PAI)
TIE (C3I)
TIE (C4I)
TIE (C5I)
TIE (C6I)
TIE (C7I)
None
None
None
None
RST
in the device electrical
Freescale Semiconductor
Wake up
STOP
Yes
Yes
No
No
No
No
No
No
No
No
No
No
Wake up
WAIT
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No

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