S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 973

• Manufacturer Part Number: S912XET512J3VALR
• Description: 16-bit Microcontrollers - MCU 16 BIT,512K FLASH
• Manufacturer: Freescale Semiconductor

Specifications of S912XET512J3VALR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12XE
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 512 KB
• Data Ram Size: 32 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-112
• Mounting Style: SMD/SMT

26.3.2.9
The FPROT register defines which P-Flash sectors are protected against program and erase operations.
Freescale Semiconductor
PGMERIF
EPVIOLIF
ERSERIF
ERSVIF1
ERSVIF0
DFDIF
SFDIF
Field
7
6
4
3
2
1
0
EEE Erase Error Interrupt Flag — The setting of the ERSERIF flag occurs due to an error in a Flash erase
command that resulted in the erase operation not being successful during EEE operations. The ERSERIF flag
is cleared by writing a 1 to ERSERIF. Writing a 0 to the ERSERIF flag has no effect on ERSERIF. While
ERSERIF is set, it is possible to write to the buffer RAM EEE partition but the data written will not be transferred
to the D-Flash EEE partition.
0 Erase command successfully completed on the D-Flash EEE partition
1 Erase command failed on the D-Flash EEE partition
EEE Program Error Interrupt Flag — The setting of the PGMERIF flag occurs due to an error in a Flash
program command that resulted in the program operation not being successful during EEE operations. The
PGMERIF flag is cleared by writing a 1 to PGMERIF. Writing a 0 to the PGMERIF flag has no effect on
PGMERIF. While PGMERIF is set, it is possible to write to the buffer RAM EEE partition but the data written will
not be transferred to the D-Flash EEE partition.
0 Program command successfully completed on the D-Flash EEE partition
1 Program command failed on the D-Flash EEE partition
EEE Protection Violation Interrupt Flag —The setting of the EPVIOLIF flag indicates an attempt was made to
write to a protected area of the buffer RAM EEE partition. The EPVIOLIF flag is cleared by writing a 1 to
EPVIOLIF. Writing a 0 to the EPVIOLIF flag has no effect on EPVIOLIF. While EPVIOLIF is set, it is possible to
write to the buffer RAM EEE partition as long as the address written to is not in a protected area.
0 No EEE protection violation
1 EEE protection violation detected
EEE Error Interrupt 1 Flag —The setting of the ERSVIF1 flag indicates that the memory controller was unable
to change the state of a D-Flash EEE sector. The ERSVIF1 flag is cleared by writing a 1 to ERSVIF1. Writing a
0 to the ERSVIF1 flag has no effect on ERSVIF1. While ERSVIF1 is set, it is possible to write to the buffer RAM
EEE partition but the data written will not be transferred to the D-Flash EEE partition.
0 No EEE sector state change error detected
1 EEE sector state change error detected
EEE Error Interrupt 0 Flag —The setting of the ERSVIF0 flag indicates that the memory controller was unable
to format a D-Flash EEE sector for EEE use. The ERSVIF0 flag is cleared by writing a 1 to ERSVIF0. Writing a
0 to the ERSVIF0 flag has no effect on ERSVIF0. While ERSVIF0 is set, it is possible to write to the buffer RAM
EEE partition but the data written will not be transferred to the D-Flash EEE partition.
0 No EEE sector format error detected
1 EEE sector format error detected
Double Bit Fault Detect Interrupt Flag — The setting of the DFDIF flag indicates that a double bit fault was
detected in the stored parity and data bits during a Flash array read operation or that a Flash array read operation
was attempted on a Flash block that was under a Flash command operation. The DFDIF flag is cleared by writing
a 1 to DFDIF. Writing a 0 to DFDIF has no effect on DFDIF.
0 No double bit fault detected
1 Double bit fault detected or an invalid Flash array read operation attempted
Single Bit Fault Detect Interrupt Flag — With the IGNSF bit in the FCNFG register clear, the SFDIF flag
indicates that a single bit fault was detected in the stored parity and data bits during a Flash array read operation
or that a Flash array read operation was attempted on a Flash block that was under a Flash command operation.
The SFDIF flag is cleared by writing a 1 to SFDIF. Writing a 0 to SFDIF has no effect on SFDIF.
0 No single bit fault detected
1 Single bit fault detected and corrected or an invalid Flash array read operation attempted
P-Flash Protection Register (FPROT)
MC9S12XE-Family Reference Manual Rev. 1.25
Table 26-18. FERSTAT Field Descriptions
Description
Chapter 26 384 KByte Flash Module (S12XFTM384K2V1)
973