S912XET512J3VALR Freescale Semiconductor, S912XET512J3VALR Datasheet - Page 1101

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S912XET512J3VALR

Manufacturer Part Number
S912XET512J3VALR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XET512J3VALR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12XE
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
32 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-112
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XET512J3VALR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
28.3.2.9.1
The general guideline is that P-Flash protection can only be added and not removed.
all valid transitions between P-Flash protection scenarios. Any attempt to write an invalid scenario to the
FPROT register will be ignored. The contents of the FPROT register reflect the active protection scenario.
See the FPHS and FPLS bit descriptions for additional restrictions.
28.3.2.10 EEE Protection Register (EPROT)
The EPROT register defines which buffer RAM EEE partition areas are protected against writes.
All bits in the EPROT register are readable and writable except for RNV[6:4] which are only readable. The
EPOPEN and EPDIS bits can only be written to the protected state. The EPS bits can be written anytime
until the EPDIS bit is cleared. If the EPOPEN bit is cleared, the state of the EPDIS and EPS bits is
irrelevant.
During the reset sequence, the EPROT register is loaded from the EEE protection byte in the Flash
configuration field at global address 0x7F_FF0D located in P-Flash memory (see
by reset condition F in
sequence, the P-Flash sector containing the EEE protection byte must be unprotected, then the EEE
protection byte must be programmed. If a double bit fault is detected while reading the P-Flash phrase
Freescale Semiconductor
Offset Module Base + 0x0009
Reset
W
R
EPOPEN
F
7
P-Flash Protection Restrictions
1. Allowed transitions marked with X, see
Protection
Scenario
From
= Unimplemented or Reserved
0
1
2
3
4
5
6
7
Figure
F
6
Table 28-23. P-Flash Protection Scenario Transitions
Figure 28-15. EEE Protection Register (EPROT)
28-15. To change the EEE protection that will be loaded during the reset
MC9S12XE-Family Reference Manual Rev. 1.25
X
X
0
RNV[6:4]
F
5
X
X
X
X
1
X
X
X
X
2
To Protection Scenario
F
4
Figure 28-14
X
X
X
X
X
X
X
X
3
EPDIS
Chapter 28 768 KByte Flash Module (S12XFTM768K4V2)
X
X
X
X
4
for a definition of the scenarios.
F
3
(1)
5
X
X
F
2
X
X
6
Table
Table 28-23
EPS[2:0]
X
7
F
1
28-3) as indicated
specifies
F
0
1101

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