MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 22

• Manufacturer Part Number: MT29F128G08WAAC6
• Description: NAND Flash Memory
• Manufacturer: Micron

Command Definitions
Table 6:
PDF: 09005aef8278ee3f / Source: 09005aef81f17540
16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
Command
PAGE READ
PAGE READ CACHE MODE SEQUENTIAL
PAGE READ CACHE MODE RANDOM
PAGE READ CACHE MODE LAST
READ for INTERNAL DATA MOVE
RANDOM DATA READ
READ ID
READ PARAMETER PAGE
READ STATUS
PROGRAM PAGE
PROGRAM PAGE CACHE MODE
PROGRAM for INTERNAL DATA MOVE
RANDOM DATA INPUT
BLOCK ERASE
RESET
OTP DATA PROGRAM
OTP DATA PROTECT
OTP DATA READ
SET FEATURES
GET FEATURES
Command Set
Notes: 1. Indicates required DATA cycles between COMMAND cycle 1 and COMMAND cycle 2.
2. These commands are valid during busy when an interleaved die operation is being per-
3. The sequential PAGE READ CACHE MODE command should not be issued prior to reading
4. When using the random PAGE READ CACHE MODE command, the plane select bit must be
5. Do not cross plane address boundaries when using READ for INTERNAL DATA MOVE and
formed. See “Interleaved Die Operations” on page 68 for additional details.
the last page of a block.
the same as the page last read.
PROGRAM for INTERNAL DATA MOVE. See Figure 8 on page 15 for plane address bound-
ary definitions.
Command
Micron Confidential and Proprietary
Cycle 1
A0h
A5h
AFh
00h
31h
00h
00h
05h
90h
ECh
70h
80h
80h
85h
85h
60h
EEh
3Fh
FFh
EFh
Number of
Address
Cycles
22
5
5
5
2
1
1
5
5
5
2
3
5
5
5
1
1
–
–
–
–
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16, 32, 64, 128Gb NAND Flash Memory
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Required
Optional
Cycles
Data
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
4
1
Command
Cycle 2
D0h
30h
31h
35h
E0h
10h
15h
10h
10h
10h
30h
–
–
–
–
–
–
–
–
–
Command Definitions
©2005 Micron Technology, Inc. All rights reserved.
During
Valid
Busy
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Notes
2, 5
2, 5
2
3
2
2
2
2
2
2
4
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