MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 65

• Manufacturer Part Number: MT29F128G08WAAC6
• Description: NAND Flash Memory
• Manufacturer: Micron

Figure 41:
TWO-PLANE BLOCK ERASE 60h-D1h-60h-D0h
PDF: 09005aef8278ee3f / Source: 09005aef81f17540
16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
R/B#
R/B#
I/Ox
I/Ox
1
t DBSY
00h
85h
Address (5 cycles)
TWO-PLANE INTERNAL DATA MOVE with RANDOM DATA INPUT
1st-plane source
2nd-plane destination
Address (5 cycles)
Notes: 1. Command can be 70h or 78h.
The TWO-PLANE BLOCK ERASE (60h-D1h-60h-D0h) operation is similar to the BLOCK
ERASE (60h-D0h) operation. It erases two blocks instead of one. The blocks to be erased
must be on different planes on the same die. The first-plane and second-plane addresses
must meet the two-plane addressing requirements (see “Two-Plane Addressing” on
page 55).
To begin the TWO-PLANE BLOCK ERASE operation, write the 60h command to the com-
mand register, followed by 3 ADDRESS cycles of the first-plane block address. Next, write
the D1h command. The D1h command is a “dummy” command. R/B# goes LOW for
t
device is ready when the status register bit 6 is set to “1.” The only valid commands dur-
ing
After
cycles for the second plane. Finally, issue the D0h command.
R/B# goes LOW for the duration of block erase time,
plete, R/B# returns HIGH. A READ STATUS command also indicates that the device is
ready when status register bit 6 is set to “1.”
The only valid commands during
RESET (FFh).
If the READ STATUS (70h) command indicates an error in the operation (status register
bit 0 is “1”), then use the TWO-PLANE/MULTIPLE-DIE READ STATUS (78h) command
twice—once for each plane—to determine which plane operation failed.
Alternatively, the D1h command may be omitted. In this case, there is no
DBSY, then returns HIGH. The READ STATUS (70h) command also indicates that the
00h
t
DBSY are READ STATUS (70h and 78h) and RESET (FFh).
t
optional
DBSY, write the 60h command to the command register followed by 3 ADDRESS
Address (5 cycles)
2nd-plane source
Data
Data
85h
Unlimited number of repetitions
Micron Confidential and Proprietary
Address (2 cycles)
35h
t R
65
85h
Data
www.DataSheet.net/
1st-plane destination
t
BERS are READ STATUS (70h, 78h) commands and
Address (5 cycles)
16, 32, 64, 128Gb NAND Flash Memory
10h
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t PROG
optional
Data
Data
t
BERS. When block erasure is com-
85h
Unlimited number of repetitions
70h
Command Definitions
1
Address (2 cycles)
©2005 Micron Technology, Inc. All rights reserved.
Status
t
DBSY time.
Data
11h
1
Datasheet pdf - http://www.DataSheet4U.co.kr/