MT29F128G08WAAC6 Micron, MT29F128G08WAAC6 Datasheet - Page 44

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MT29F128G08WAAC6

Manufacturer Part Number
MT29F128G08WAAC6
Description
NAND Flash Memory
Manufacturer
Micron
Datasheet
BLOCK ERASE Operation
BLOCK ERASE 60h-D0h
Figure 26:
PDF: 09005aef8278ee3f / Source: 09005aef81f17540
16gb_nand_mlc_l52a__2.fm -Rev. D 5/08 EN
WE#
R/B#
I/Ox
ALE
CE#
RE#
CLE
60h
BLOCK ERASE Operation
Address input (3 cycles)
Notes: 1. Command can be 70h or 78h.
Erasing occurs at the block level. For example, the MT29F16G08MxA device has 4,096
erase blocks, organized into 128 pages per block, 4,314 bytes per page (4,096 + 218
bytes). Each block is 539K bytes (512K + 27K bytes). The BLOCK ERASE command oper-
ates on one block at a time (see Figure 26).
The last 3 cycles of addresses of the 5-cycle addressing sequence are required for a
BLOCK ERASE operation. The first 2 cycles of addresses must not be used. Although the
page address bits are loaded, they are a “Don’t Care” and are ignored for BLOCK ERASE
operations, since these bits normally specify the page address within a block. See
“Addressing” on page 13 for details.
The actual command sequence is a two-step process. The ERASE SETUP (60h) com-
mand is first written to the command register. Then 3 cycles of addresses are written to
the device. Next, the ERASE CONFIRM (D0h) command is written to the command reg-
ister. At the rising edge of WE#, R/B# goes LOW and the control logic automatically con-
trols the timing and erase-verify operations. R/B# stays LOW for the entire
time.
The READ STATUS (70h and 78h) commands can be used to check the status of the error.
When bit 6 is “1,” the ERASE operation is complete. Bit 0 indicates a pass/fail condition
where “0” is pass (see Figure 26, and Table 11 on page 34).
Micron Confidential and Proprietary
D0h
44
www.DataSheet.net/
t BERS
16, 32, 64, 128Gb NAND Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
70h
1
I/O 0 = 0 ERASE successful
I/O 0 = 1 ERASE error
Command Definitions
©2005 Micron Technology, Inc. All rights reserved.
Status
t
BERS erase
Don‘t Care
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