MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 315

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 14-2 describes UMR1n fields.
7
6
5
4–3
2
1–0
Bits
Address
Reset
Field
R/W
RxRTS
RxIRQ/
FFULL
ERR
PM
PT
B/C
Name
MBAR + 0x1C0 (UART0), 0x200 (UART1). After UMR1n is read or written, the pointer points to UMR2n.
RxRTS
7
Receiver request-to-send. Allows the RTS output to control the CTS input of the transmitting device
to prevent receiver overrun. If both the receiver and transmitter are incorrectly programmed for RTS
control, RTS control is disabled for both. Transmitter RTS control is configured in UMR2n[TxRTS].
0 The receiver has no effect on RTS.
1 When a valid start bit is received, RTS is negated if the UART's FIFO is full. RTS is reasserted
Receiver interrupt select.
0 RxRDY is the source that generates IRQ.
1 FFULL is the source that generates IRQ.
Error mode. Configures the FIFO status bits, USRn[RB,FE,PE].
0 Character mode. The USRn values reflect the status of the character at the top of the FIFO. ERR
1 Block mode. The USRn values are the logical OR of the status for all characters reaching the top of
Parity mode. Selects the parity or multidrop mode for the channel. The parity bit is added to the
transmitted character, and the receiver performs a parity check on incoming data. The value of PM
affects PT, as shown below.
Parity type. PM and PT together select parity type (PM = 0x) or determine whether a data or address
character is transmitted (PM = 11).
Bits per character. Select the number of data bits per character to be sent. The values shown do not
include start, parity, or stop bits.
00 5 bits
01 6 bits
10 7 bits
11 8 bits
when the FIFO has an empty position available.
must be 0 for correct A/D flag information when in multidrop mode.
the FIFO because the last
Section 14.3.5, “UART Command Registers (UCRn).”
RxIRQ/FFULL
Figure 14-2. UART Mode Registers 1 (UMR1n)
PM
00
01
10
11
6
Freescale Semiconductor, Inc.
Table 14-2. UMR1n Field Descriptions
For More Information On This Product,
With parity
Force parity
No parity
Multidrop mode
Parity Mode
Chapter 14. UART Modules
ERR
Go to: www.freescale.com
5
RESET ERROR STATUS
Even parity
Low parity
Data character
4
0000_0000
Parity Type (PT= 0)
Description
R/W
PM
command for the channel was issued. See
3
n/a
Odd parity
High parity
Address character
PT
2
Parity Type (PT= 1)
Register Descriptions
1
B/C
0
14-5