HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 135

• Manufacturer Part Number: HD64F7047F50
• Description: IC SUPERH MCU FLASH 256K 100QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

6.8
The following data transfers can be done using interrupt request signals:
• Activate DTC only, CPU interrupts according to DTC settings
The INTC masks CPU interrupts when the corresponding DTE bit is 1. The conditions for clearing
DTE and interrupt source flag are listed below.
Where: DTECLR = DISEL + counter 0.
Figure 6.6 shows a control block diagram.
6.8.1
1. For DTC, set the corresponding DTE bits and DISEL bits to 1.
2. Activating sources are applied to the DTC when interrupts occur.
3. When the DTC performs a data transfer, it clears the DTE bit to 0 and sends an interrupt
4. The CPU clears interrupt sources in the interrupt processing routine then confirms the transfer
request to the CPU. The activating source is not cleared.
counter value. When the transfer counter value is not 0, the CPU sets the DTE bit to 1 and
allows the next data transfer. If the transfer counter value = 0, the CPU performs the necessary
end processing in the interrupt processing routine.
Interrupt source
flag clear (by DTC)
DTE clear condition = DTC transfer end • DTECLR
Interrupt source flag clear condition = DTC transfer end • DTECLR
Interrupt source
Data Transfer with Interrupt Request Signals
Handling Interrupt Request Signals as Sources for DTC Activating and CPU
Interrupt
Figure 6.6 Interrupt Control Block Diagram
DTE clear
DTER
Rev. 2.00, 09/04, page 93 of 720
CPU interrupt request
DTC activation
request
DTECLR
Transfer end