HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 437

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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13.7.4
If the conditions below are not met, the reliability of the device may be adversely affected.
• Analog input voltage range
• Relationship between AVcc, AVss and Vcc, Vss
13.7.5
In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,
and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close
proximity should be avoided as far as possible. Failure to do so may result in incorrect operation
of the analog circuitry due to inductance, adversely affecting A/D conversion values. Also, digital
circuitry must be isolated from the analog input signals (AN0 to AN15), and analog power supply
(AVcc) by the analog ground (AVss). Also, the analog ground (AVss) should be connected at one
point to a stable ground (Vss) on the board.
13.7.6
A protection circuit should be connected in order to prevent damage due to abnormal voltage, such
as an excessive surge at the analog input pins (AN0 to AN15), between AVcc and AVss, as shown
in figure 13.7. Also, the bypass capacitors connected to AVcc and the filter capacitor connected to
AN0 to AN15 must be connected to AVss.
If a filter capacitor is connected, the input currents at the analog input pins (AN0 to AN15) are
averaged, and so an error may arise. Also, when A/D conversion is performed frequently, as in
scan mode, if the current charged and discharged by the capacitance of the sample-and-hold circuit
in the A/D converter exceeds the current input via the input impedance (R
the analog input pin voltage. Careful consideration is therefore required when deciding circuit
constants.
The voltage applied to analog input pin ANn during A/D conversion should be in the range
AVss ≤ VAN ≤ AVcc.
Set AVss = Vss for the relationship between AVcc, AVss and Vcc, Vss. If the A/D converter
is not used, the AVcc and AVss pins must not be left open.
Range of Analog Power Supply and Other Pin Settings
Notes on Board Design
Notes on Noise Countermeasures
Rev. 2.00, 09/04, page 395 of 720
in
), an error will arise in

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