HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 442
HD64F7047F50
Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet
1.HD64F7047F50V.pdf
(766 pages)
Specifications of HD64F7047F50
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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14.2.3
The compare match timer counter (CMCNT) is a 16-bit register used as an up-counter for
generating interrupt requests. The initial value is H'0000.
14.2.4
The compare match timer constant register (CMCOR) is a 16-bit register that sets the period for
compare match with CMCNT. The initial value is H'FFFF.
14.3
14.3.1
When an internal clock is selected with the CKS1, CKS0 bits of the CMCSR register and the STR
bit of CMSTR is set to 1, CMCNT begins incrementing with the selected clock. When the
CMCNT counter value matches that of the compare match constant register (CMCOR), the
CMCNT counter is cleared to H'0000 and the CMF flag of the CMCSR register is set to 1. If the
CMIE bit of the CMCSR register is set to 1 at this time, a compare match interrupt (CMI) is
requested. The CMCNT counter begins counting up again from H'0000.
Figure 14.2 shows the compare match counter operation.
Rev. 2.00, 09/04, page 400 of 720
Compare Match Timer Counter_0 and 1 (CMCNT_0, CMCNT_1)
Compare Match Timer Constant Register_0 and 1 (CMCOR_0, CMCOR_1)
Operation
Cyclic Count Operation
CMCOR
H'0000
CMCNT value
Figure 14.2 Counter Operation
Counter cleared by CMCOR
compare match
Time
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