HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 276

IC SUPERH MCU FLASH 256K 100QFP

HD64F7047F50

Manufacturer Part Number
HD64F7047F50
Description
IC SUPERH MCU FLASH 256K 100QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheet

Specifications of HD64F7047F50

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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8. Initial Output in Complementary PWM Mode
Rev. 2.00, 09/04, page 234 of 720
Negative phase
Positive phase
In complementary PWM mode, the initial output is determined by the setting of bits OLSN and
OLSP in the timer output control register (TOCR).
This initial output is the PWM pulse non-active level, and is output from when complementary
PWM mode is set with the timer mode register (TMDR) until TCNT_4 exceeds the value set in
the dead time register (TDDR). Figure 10.38 shows an example of the initial output in
complementary PWM mode.
An example of the waveform when the initial PWM duty value is smaller than the TDDR
value is shown in Figure 10.39.
output
output
Figure 10.38 Example of Initial Output in Complementary PWM Mode (1)
Timer output control register settings
OLSN bit: 0 (initial output: high; active level: low)
OLSP bit: 0 (initial output: high; active level: low)
Complementary
PWM mode
(TMDR setting)
Initial output
TGR4_A
TCNT3, 4 value
TDDR
TCNT3, 4 count start
(TSTR setting)
Active level
Dead time
TCNT_3
TCNT_4
Active level
Time

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