HD64F7047F50 Renesas Electronics America, HD64F7047F50 Datasheet - Page 378

• Manufacturer Part Number: HD64F7047F50
• Description: IC SUPERH MCU FLASH 256K 100QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Rev. 2.00, 09/04, page 336 of 720
Bit
3
2
1
0
Bit Name
CKE1
CKE0
MPIE
TEIE
0
0
Initial
Value
0
0
R/W
R/W
R/W
R/W
R/W
Description
Multiprocessor Interrupt Enable (enabled only when
the MP bit in SMR is 1 in asynchronous mode)
When this bit is set to 1, receive data in which the
multiprocessor bit is 0 is skipped, and setting of the
RDRF, FER, and ORER status flags in SSR is
prohibited. On receiving data in which the
multiprocessor bit is 1, this bit is automatically cleared
and normal reception is resumed. For details, refer to
section 12.5, Multiprocessor Communication Function.
Transmit End Interrupt Enable
This bit is set to 1, TEI interrupt request is enabled.
Clock Enable 1 and 0
Selects the clock source and SCK pin function.
Asynchronous mode:
00: Internal clock, SCK pin used for input pin (input
01: Internal clock, SCK pin used for clock output (The
10: External clock, SCK pin used for clock input (The
11: External clock, SCK pin used for clock input (The
Clocked synchronous mode:
00: Internal clock, SCK pin used for synchronous clock
01: Internal clock, SCK pin used for synchronous clock
10: External clock, SCK pin used for synchronous
11: External clock, SCK pin used for synchronous
signal is ignored) or output pin (output level is
undefined)
output clock frequency is the same as the bit rate)
input clock frequency is 16 times the bit rate)
input clock frequency is 16 times the bit rate)
output
output
clock input
clock input