CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 1026

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)

24.0.5.65 Port AD1 Pull Up Enable Register 1 (PER1AD1)

Read: Anytime.

Write: Anytime.

This register activates a pull-up device on the respective PAD[7:0] pin if the port is used as input. This bit

has no effect if the port is used as output. Out of reset no pull-up device is enabled.

Functional Description

Each pin except PE0, PE1, and BKGD can act as general purpose I/O. In addition each pin can act as an

output from the external bus interface module or a peripheral module or an input to the external bus

interface module or a peripheral module.

A set of configuration registers is common to all ports with exceptions in the expanded bus interface and

not become active.

This device does not become active while the port is used as a push-pull output.

PER1AD1[7:0]

Example: Selecting a pull-up device

Pull Device Enable Port AD1 Register 1

0 Pull-up device is disabled.

1 Pull-up device is enabled.

24-60). All registers can be written at any time; however a specific configuration might

Figure 24-67. Port AD1 Pull Up Enable Register 1 (PER1AD1)

Table 24-60. Register Availability per Port

Table 24-59. PER1AD1 Field Descriptions

MC9S12XDP512 Data Sheet, Rev. 2.21

Freescale Semiconductor