CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 487

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.3.2.5
Read: Anytime, if AMAP = 1
Write: Anytime, if AMAP = 1
Freescale Semiconductor
BERRM[1:0]
BKDFE
Reset
Field
2:1
0
W
R
BERRM1
Bit Error Mode — Those two bits determines the functionality of the bit error detect feature. See
Break Detect Feature Enable — BKDFE enables the break detect circuitry.
0 Break detect circuit disabled
1 Break detect circuit enabled
SCI Alternative Control Register 2 (SCIACR2)
0
0
1
1
0
0
7
= Unimplemented or Reserved
BERRM0
Figure 11-8. SCI Alternative Control Register 2 (SCIACR2)
0
1
0
1
0
0
6
Bit error detect circuit is disabled
Receive input sampling occurs during the 9th time tick of a transmitted bit
(refer to
Receive input sampling occurs during the 13th time tick of a transmitted bit
(refer to
Reserved
Table 11-7. SCIACR2 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
Table 11-8. Bit Error Mode Coding
0
0
5
Figure
Figure
11-19)
11-19)
0
0
4
Description
Function
Chapter 11 Serial Communication Interface (S12SCIV5)
0
0
3
BERRM1
0
2
BERRM0
0
1
Table
BKDFE
11-8.
0
0
487