CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 857

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.3.2.43 Port P Polarity Select Register (PPSP)
Read: Anytime.
Write: Anytime.
This register serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting
a pull-up or pull-down device if enabled.
22.3.2.44 Port P Interrupt Enable Register (PIEP)
Read: Anytime.
Write: Anytime.
This register disables or enables on a per-pin basis the edge sensitive external interrupt associated with
Port P.
Freescale Semiconductor
PPSP[7:0]
PIEP[7:0]
Reset
Reset
Field
Field
7–0
7–0
W
W
R
R
PPSP7
PIEP7
Polarity Select Port P
0 Falling edge on the associated port P pin sets the associated flag bit in the PIFP register.A pull-up device is
1 Rising edge on the associated port P pin sets the associated flag bit in the PIFP register.A pull-down device
Interrupt Enable Port P
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
0
0
7
7
connected to the associated port P pin, if enabled by the associated bit in register PERP and if the port is used
as input.
is connected to the associated port P pin, if enabled by the associated bit in register PERP and if the port is
used as input.
PPSP6
PIEP6
0
0
6
6
Figure 22-46. Port P Interrupt Enable Register (PIEP)
Figure 22-45. Port P Polarity Select Register (PPSP)
Table 22-42. PPSP Field Descriptions
Table 22-43. PIEP Field Descriptions
PPSP5
MC9S12XDP512 Data Sheet, Rev. 2.21
PIEP5
0
0
5
5
PPSP4
PIEP4
0
0
4
4
Description
Description
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
PPSP3
PIEP3
0
0
3
3
PPSP2
PIEP2
0
0
2
2
PPSP1
PIEP1
0
0
1
1
PPSP0
PIEP0
0
0
0
0
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