CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 253

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CPCH
Operation
RS.H - IMM8 - C
Subtracts the carry bit and the 8 bit constant IMM8 contained in the instruction code from the high byte of
the source register RD using binary subtraction and updates the condition code register accordingly. The
carry bit and Zero bits are taken into account to allow a 16 bit compare in the form of
Remark: There is no equivalent operation using triadic addressing. Comparing the values of two registers
can be performed by using the subtract instruction with R0 as destination register.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
CPCH RD, #IMM8
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $00 and Z was set before this operation; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RS[15] & IMM8[7] & result[15] | RS[15] & IMM8[7] & result[15]
Set if there is a carry from the bit 15 of the result; cleared otherwise.
RS[15] & IMM8[7] | RS[15] & result[15] | IMM8[7] & result[15]
Z
CMPL
CPCH
BCC
V
Source Form
C
R2,#LOWBYTE
R2,#HIGHBYTE
NONE, only condition code flags get updated
Compare Immediate 8 bit Constant with
Address
MC9S12XDP512 Data Sheet, Rev. 2.21
Mode
IMM8
; branch condition
Carry (High Byte)
1
1
0
1
1
Machine Code
RS
Chapter 6 XGATE (S12XGATEV2)
IMM8
CPCH
Cycles
P
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