CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 461

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Freescale Semiconductor
Extended Identifier
Standard Identifier
CAN 2.0A/B
CAN 2.0B
Four identifier acceptance filters, each to be applied to
— a) the 14 most significant bits of the extended identifier plus the SRR and IDE bits of CAN 2.0B
— b) the 11 bits of the standard identifier, the RTR and IDE bits of CAN 2.0A/B messages.
Eight identifier acceptance filters, each to be applied to the first 8 bits of the identifier. This mode
implements eight independent filters for the first 8 bits of a CAN 2.0A/B compliant standard
identifier or a CAN 2.0B compliant extended identifier.
filter bank (CANIDAR0–CANIDAR3, CANIDMR0–CANIDMR3) produces filter 0 to 3 hits.
Similarly, the second filter bank (CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7)
produces filter 4 to 7 hits.
Closed filter. No CAN message is copied into the foreground buffer RxFG, and the RXF flag is
never set.
messages or
Figure 10-41
CANIDMR0–3CANIDMR) produces filter 0 and 1 hits. Similarly, the second filter bank
(CANIDAR4–CANIDAR7, CANIDMR4–CANIDMR7) produces filter 2 and 3 hits.
AM7
AC7
ID28
ID10
CANIDMR0
CANIDAR0
IDR0
IDR0
Figure 10-40. 32-bit Maskable Identifier Acceptance Filter
shows how the first 32-bit filter bank (CANIDAR0–CANIDA3,
AM0
ID21
AC0
ID3
MC9S12XDP512 Data Sheet, Rev. 2.21
AM7
AC7
ID20
ID2
CANIDMR1
CANIDAR1
IDR1
IDR1
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
ID Accepted (Filter 0 Hit)
IDE
AM0
ID15
AC0
AM7
AC7
ID14
ID10
Figure 10-42
CANIDMR2
CANIDAR2
IDR2
IDR2
shows how the first 32-bit
AM0
AC0
ID7
ID3
AM7
AC7
ID6
ID10
CANIDMR3
CANIDAR3
IDR3
IDR3
AM0
AC0
RTR
ID3
461

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