CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 147

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3.2.11
This read-only register contains the Conversion Complete Flags CCF7 to CCF0
Read: Anytime
Write: Anytime, no effect
Freescale Semiconductor
CCF[7:0]
Reset
Field
7:0
W
R
CCF7
ATD Status Register 1 (ATDSTAT1)
0
7
Conversion Complete Flag Bits — A conversion complete flag is set at the end of each conversion in a
conversion sequence. The flags are associated with the conversion position in a sequence (and also the result
register number). Therefore, CCF0 is set when the first conversion in a sequence is complete and the result is
available in result register ATDDR0; CCF1 is set when the second conversion in a sequence is complete and
the result is available in ATDDR1, and so forth. A CCF flag is cleared when one of the following occurs:
In case of a concurrent set and clear on CCFx: The clearing by method A) will overwrite the set. The clearing
by methods B) or C) will be overwritten by the set.
Conversion number x not completed
Conversion number x has completed, result ready in ATDDRx
• Write to ATDCTL5 (a new conversion sequence is started)
• If AFFC = 0 and read of ATDSTAT1 followed by read of result register ATDDRx
• If AFFC = 1 and read of result register ATDDRx
= Unimplemented or Reserved
CCF6
0
6
Figure 4-13. ATD Status Register 1 (ATDSTAT1)
Table 4-22. ATDSTAT1 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
CCF5
0
5
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
CCF4
0
4
Description
CCF3
0
3
CCF2
0
2
CCF1
0
1
CCF0
0
0
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