CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 493

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.4
This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 11-14
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
Freescale Semiconductor
SBR12:SBR0
Clock
RXD
Bus
Decoder
Functional Description
Infrared
Receive
Baud Rate
Generator
IREN
shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial
Ir_RXD
T8
R16XCLK
R32XCLK
16
SCRXD
TNP[1:0]
Shift Register
and Wakeup
Data Format
Transmit
Encoder
Infrared
SCI Data
Transmit
Transmit
Receive
Register
Control
Control
Control
Figure 11-14. Detailed SCI Block Diagram
MC9S12XDP512 Data Sheet, Rev. 2.21
SCTXD
IREN
Shift Register
SCI Data
Receive
Ir_TXD
Register
LOOPS
LOOPS
WAKE
RSRC
RSRC
RWU
SBK
RE
ILT
PE
PT
TE
M
RXD
TDRE
Chapter 11 Serial Communication Interface (S12SCIV5)
RDRF
TCIE
TIE
IDLE
RAF
RIE
Break Detect
LIN Transmit
TC
BERRM[1:0]
OR
Active Edge
R8
NF
FE
PF
BKDFE
Collision
Detect
Detect
RXEDGIE
ILIE
BKDIE
BERRIF
RXEDGIF
BKDIF
BERRIE
TDRE
TC
TXD
IDLE
SCI
Interrupt
Request
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