CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 542

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 13 Periodic Interrupt Timer (S12PIT24B4CV1)
13.1.4
Figure 13-1
13.2
The PIT module has no external pins.
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Bus Clock
PIT operation in wait mode is controlled by the PITSWAI bit located in the PITCFLMT register.
In wait mode, if the bus clock is globally enabled and if the PITSWAI bit is clear, the PIT operates
like in run mode. In wait mode, if the PITSWAI bit is set, the PIT module is stalled.
Stop mode
In full stop mode or pseudo stop mode, the PIT module is stalled.
Freeze mode
PIT operation in freeze mode is controlled by the PITFRZ bit located in the PITCFLMT register.
In freeze mode, if the PITFRZ bit is clear, the PIT operates like in run mode. In freeze mode, if the
PITFRZ bit is set, the PIT module is stalled.
External Signal Description
Block Diagram
shows a block diagram of the PIT.
Micro Timer 0
Micro Timer 1
8-Bit
8-Bit
Micro Time
Base 0
Micro
Time
Base 1
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 13-1. PIT Block Diagram
16-Bit Timer 0
16-Bit Timer 1
16-Bit Timer 2
16-Bit Timer 3
Time-Out 0
Time-Out 1
Time-Out 2
Time-Out 3
Interface
Interface
Interface
Interface
Freescale Semiconductor
Interrupt 0
Trigger 0
Interrupt 1
Trigger 1
Interrupt 2
Trigger 2
Interrupt 3
Trigger 3