CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 339

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.3.2.21
Read: Anytime
Write: Anytime.
All bits reset to zero.
The 8-bit pulse accumulators PAC3 and PAC2 can be enabled only if PAEN in PACTL is cleared. If PAEN
is set, PA3EN and PA2EN have no effect.
The 8-bit pulse accumulators PAC1 and PAC0 can be enabled only if PBEN in PBCTL is cleared. If PBEN
is set, PA1EN and PA0EN have no effect.
Freescale Semiconductor
PA[3:0]EN
Reset
Field
3:0
W
R
8-Bit Pulse Accumulator ‘x’ Enable
0 8-Bit Pulse Accumulator is disabled.
1 8-Bit Pulse Accumulator is enabled.
ICPAR — Input Control Pulse Accumulators Register (ICPAR)
0
0
7
= Unimplemented or Reserved
Figure 7-43. Input Control Pulse Accumulators Register (ICPAR)
0
0
6
Table 7-25. ICPAR Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
0
0
5
0
0
4
Description
PA3EN
Chapter 7 Enhanced Capture Timer (S12ECT16B8CV2)
0
3
PA2EN
0
2
PA1EN
0
1
PA0EN
0
0
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