CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 455

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

This register deﬁnes the local priority of the associated message buffer. The local priority is used for the

internal prioritization process of the MSCAN and is deﬁned to be highest for the smallest binary number.

The MSCAN implements the following internal prioritization mechanisms:

In cases of more than one buffer having the same lowest priority, the message buffer with the lower index

number wins.

Read: Anytime when TXEx ﬂag is set (see

(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see

“MSCAN Transmit Buffer Selection Register

Write: Anytime when TXEx ﬂag is set (see

(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see

“MSCAN Transmit Buffer Selection Register

If the TIME bit is enabled, the MSCAN will write a time stamp to the respective registers in the active

transmit or receive buffer right after the EOF of a valid message on the CAN bus (see

Freescale Semiconductor

All transmission buffers with a cleared TXEx ﬂag participate in the prioritization immediately

before the SOF (start of frame) is sent.

The transmission buffer with the lowest local priority ﬁeld wins the prioritization.

Transmit Buffer Priority Register (TBPR)

Time Stamp Register (TSRH–TSRL)

Figure 10-36. Transmit Buffer Priority Register (TBPR)

MC9S12XDP512 Data Sheet, Rev. 2.21

Table 10-33. Data Length Codes

Data Length Code

Section 10.3.2.7, “MSCAN Transmitter Flag Register

(CANTBSEL)”).

Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)

Section 10.3.2.11,

Section 10.3.2.1,