CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 963

Manufacturer Part Number

CSM9S12XDT512SLK

KIT STUDENT LEARNING 16BIT

Manufacturer

Freescale Semiconductor

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

23.0.6.10 Module Routing Register

This register supports the re-routing of the CAN0, CAN4, SPI0, SPI1, and SPI2 pins to alternative

ports. This allows a software re-configuration of the pinouts of the different package options with

respect to above peripherals.

The BKGD pin is associated with the S12X_BDM and S12X_EBI modules. During reset, the

BKGD pin is used as MODC input.

Port A pins PA[7:0] and Port B pins PB[7:0] can be used for either general-purpose I/O, or, in 144-

pin packages, also with the external bus interface. In this case port A and port B are associated with

the external address bus outputs ADDR15–ADDR8 and ADDR7–ADDR0, respectively. PB0 is the

ADDR0 or UDS output.

Port C pins PC[7:0] and port D pins PD[7:0] can be used for either general-purpose I/O, or, in 144-

pin packages, also with the external bus interface. In this case port C and port D are associated with

the external data bus inputs/outputs DATA15–DATA8 and DATA7–DATA0, respectively.

These pins are configured for reduced input threshold in certain operating modes (refer to

S12X_EBI section).

Port A and B

Port C and D

The purpose of the module routing register is to provide maximum

ﬂexibility for derivatives with a lower number of MSCAN and SPI

Port C and D are neither available in 112-pin nor in 80-pin packages.

Table 23-68. Module Implementations on Derivatives

MSCAN Modules