CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 976

• Manufacturer Part Number: CSM9S12XDT512SLK
• Description: KIT STUDENT LEARNING 16BIT
• Manufacturer: Freescale Semiconductor

Specifications of CSM9S12XDT512SLK

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 24 DG128 Port Integration Module (S12XDG128PIMV2)
External Signal Description
This section lists and describes the signals that do connect off-chip.
24.0.3
Table 24-1
“Functional Description”
978
Port
—
A
B
E
K
T
Pin Name
PB[7:0]
PE[6:5]
PE[3:2]
PK[5:0]
PT[7:0]
PA[7:0]
BKGD
shows all the pins and their functions that are controlled by the PIM. Refer to
PE[7]
PE[4]
PE[1]
PE[0]
PK[7]
Signal Properties
If there is more than one function associated with a pin, the priority is
indicated by the position in the table from top (highest priority) to bottom
(lowest priority).
Pin Function
and Priority
XCLKS
ECLKX2
IOC[7:0]
MODC
BKGD
ECLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
XIRQ
GPIO
GPIO
GPIO
GPIO
IRQ
Table 24-1. Pin Functions and Priorities (Sheet 1 of 5)
for the availability of the individual pins in the different package options.
1
1
MC9S12XDP512 Data Sheet, Rev. 2.21
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
MODC input during RESET
S12X_BDM communication pin
General-purpose I/O
General-purpose I/O
External clock selection input during RESET
Free-running clock output at Core Clock rate (ECLK x 2)
General-purpose I/O
General-purpose I/O
Free-running clock output at the Bus Clock rate or
programmable divided in normal modes
General-purpose I/O
General-purpose I/O
Maskable level- or falling edge-sensitive interrupt input
General-purpose I/O
Non-maskable level-sensitive interrupt input
General-purpose I/O
General-purpose I/O
General-purpose I/O
Enhanced Capture Timer Channels 7–0 input/output
General-purpose I/O
NOTE
Description
Freescale Semiconductor
Section ,
Pin Function
after Reset
BKGD
GPIO
GPIO
GPIO
GPIO