CSM9S12XDT512SLK Freescale Semiconductor, CSM9S12XDT512SLK Datasheet - Page 935

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CSM9S12XDT512SLK

Manufacturer Part Number
CSM9S12XDT512SLK
Description
KIT STUDENT LEARNING 16BIT
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of CSM9S12XDT512SLK

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WOMS[7:0]
PPSS[7:0]
Reset
Field
23.0.5.29 Port S Wired-OR Mode Register (WOMS)
Read: Anytime.
Write: Anytime.
This register configures the output pins as wired-OR. If enabled the output is driven active low only
(open-drain). A logic level of “1” is not driven. It applies also to the SPI and SCI outputs and allows
a multipoint connection of several serial modules. These bits have no influence on pins used as
inputs.
Field
7–0
7–0
W
R
WOMS7
Pull Select Port S
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
Wired-OR Mode Port S
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
7
0
and if the port is used as input or as wired-OR output.
and if the port is used as input.
WOMS6
Figure 23-31. Port S Wired-OR Mode Register (WOMS)
0
6
Table 23-31. WOMS Field Descriptions
Table 23-30. PPSS Field Descriptions
WOMS5
5
0
WOMS4
0
4
Description
Description
WOMS3
3
0
WOMS2
0
2
WOMS1
1
0
WOMS0
0
0

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