FX1S-30MR-ES/UL MITSUBISHI, FX1S-30MR-ES/UL Datasheet - Page 150

PLC, 16 IN, 14 RELAY OUT, 110V/2

FX1S-30MR-ES/UL

Manufacturer Part Number
FX1S-30MR-ES/UL
Description
PLC, 16 IN, 14 RELAY OUT, 110V/2
Manufacturer
MITSUBISHI
Datasheet

Specifications of FX1S-30MR-ES/UL

No. Of Analogue Inputs
16
No. Of Analogue Outputs
14
Ip/nema Rating
IP10
Approval Bodies
CE, CUL, UL
External Depth
49mm
External Length / Height
90mm
External Width
60mm
Mounting Type
Panel
5.3.4
FX Series Programmable Controlers
DIV (FNC 23)
Points to note:
a) When operating the DIV instruction in 16bit mode, two 16 bit data sources are divided into
b) When operating the DIV instruction in 32 bit mode, two 32 bit data sources are divided into
c) If the value of the source device S
DIV
FNC 23
(Division)
Mnemonic
each other. They produce two 16 bit results. The device identified as the destination address
is the lower of the two devices used to store the these results.
This storage device will actually contain a record of the number of whole times S
into S
The second, following destination register contains the remained left after the last whole
division (the remainder). Using the previous example with some test data:
This result is interpreted as 5 whole divisions with 1 left over (5
each other. They produce two 32 bit results. The device identified as the destination address
is the lower of the two devices used to store the quotient and the following two devices are
used to store the remainder, i.e. if D30 was selected as the destination of 32 bit division
operation then D30, D31 would store the quotient and D32, D33 would store the remainder.
If the location of the destination device is smaller than the obtained result, then only the
portion of the result which directly maps to the destination area will be written. If bit devices
are used as the destination area, no remainder value is calculated.
operation of the DIV instruction is cancelled.
1
(the quotient).
Divides one
source value by
another the result
is stored in the
destination device
51 (D0)
Function
10 (D2) = 5(D4) 1(D5)
K, H, KnX, KnY, KnM, KnS,T,
C, D, V, Z
See page 4-46 for more
details regarding floating
point format.
When using M8023 to subtract floating point
data, only double word (32 bit) data registers
(D) or constants (K/H) may be used.used to
perform
S1
2
is 0 (zero) then an operation error is executed and the
Operation : (Applicable to all units)
T h e p r i m a r y s o u r c e ( S
secondary source (S
destination (D). Note the normal rules of algebra
apply.
Operands
S2
KnY, KnM, KnS,
T, C, D, Z(V)
Note: Z(V) may
NOT be used for
32 bit operation
2
). The result is stored in the
D
10 + 1 = 51).
1
) i s d i v i d e d b y t h e
Applied Instructions 5
DIV,DIVP:
7steps
DDIV,
DDIVP:
13 steps
Program steps
5-28
2
will divide

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