pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 218

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pc87591l

Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet

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Embedded Controller Modules
4.15 ON-CHIP RAM
The PC87591x provides up to 4096-byte on-chip RAM array (2048-byte in PC87591E and PC87591L devices).
A 16-bit wide data bus links the core and the system RAM array. The system RAM can be byte or word accessed. Each
system RAM read or write operation is one cycle long and does not include any wait states. See Section 1.5.1 on page 33
for system RAM memory map.
4.16 ON-CHIP FLASH
The PC87591x has an on-chip flash memory device. This flash includes a Main Block, which serves as an on-chip Base
Memory, and an Information Block, which is used for device-specific parameters and user-defined data.
The Main Block (Base Memory) is used to store program and constant data of the core and/or host. In IRE and OBD envi-
ronments, the on-chip flash is used as (on-chip) Base Memory. In DEV environment, for easy and efficient code develop-
ment, the on-chip Base Memory is replaced by off-chip SRAM, which is referred to as off-chip Base Memory. See Section 1.4
on page 29 for more details about the memory emulation concept.
Note that in the PC87591L, the on-chip base memory is set to function as a ROM, with the associated limitations on write
and erase operations.
4.16.1 Features
Two flash memory blocks:
— Main Block (Base Memory)
— Information Block
Designated areas for:
— Core boot code
— Host boot code
— Factory Parameters
— Protection information
Supports flash operations:
— Read (byte/word)
— Write (byte/word)
— Erase (page)
Several access paths for flash operations:
— Core
— Host
— JTAG
— Parallel Interface
Flash contents protection:
— Different levels for each access path
— Different levels for each memory block
Flash Timing Control for:
— Command-based automatic control
— Busy and error indicators
Low Power operation
(Continued)
218
Revision 1.07

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