pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 244

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

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Embedded Controller Modules
HFCG Control Register 1 (HFCGCTRL1)
The HFCGCTRL1 register sets the frequency multiplier’s operating parameters. On V
Debugger Interface reset, it is initialized to 0C
Location: 00 FFA0
Type: Varies per bit
Bit
Name
Reset
Bit
0
1
2
3
4
5
6
7
Type
WO
WO
WO
WO
RO
RO
RO
Reserved
16
LOAD (Load M and N Values). Write 1 to this bit to perform a normal frequency change by loading
the HFCGML, HFCGMH and HFCGN buffer data to the frequency multiplier. The pre-scaler is
automatically set to a divide by 1. The bit always reads back 0. Results are undefined when more than
one of the following bits is written with 1 at the same time: LOAD, FAST, LOAD96, FAST96.
FAST (Load M, N and I Values). Write 1 to this bit to perform a fast frequency change by loading the
HFCGML, HFCGMH, HFCGN, HFCGIH and HFCGIL input buffer data in the frequency multiplier. The
pre-scaler is automatically set to a divide by 1. The bit always reads back 0. Results are undefined when
more than one of the following bits is written with 1 at the same time: LOAD, FAST, LOAD96, FAST96.
PMC ENABLE (Enable Core Domain Clock). Provides the status of the PMC enable/disable
command. Any data written to this bit is ignored.
0: Disabled
1: Enabled
OHFC (Output Clock Status). Indicates when the HFCG is oscillating and produces a stable clock.
Any data written to this bit is ignored.
0: Not oscillating
1: Oscillating with stable output
IVLID (I Value Valid).
0: Data read is invalid; repeat HFCGIL register read operation
1: Data read is valid; HFCGIH can be read
LOAD96 (Load M and N Values for 96 MHz). Write 1 to this bit to perform normal locking on 96 MHz
frequency by loading the hardwired variables M and N to the frequency multiplier. The pre-scaler is set
according to the value held in HFCGP register. The bit always reads back 0. Results are undefined
when more than one of the following bits is written with 1 at the same time: LOAD, FAST, LOAD96,
FAST96.
FAST96 (Load M, N and I Values for 96 MHz). Write 1 to this bit to perform fast locking on 96 MHz
frequency by loading the hardwired variables M and N and registers HFCGIH and HFCGIL to the
frequency multiplier. The pre-scaler is set according to the value held in HFCGP register. The bit
always reads back 0. Results are undefined results when more than one of the following bits is written
with 1 at the same time: LOAD, FAST, LOAD96, FAST96.
Reserved.
7
0
FAST96
6
0
LOAD96
(Continued)
16
5
0
.
IVLID
244
4
0
Description
OHFC
3
1
PENABLE
CC
2
1
power-up, WATCHDOG reset and
FAST
1
0
LOAD
Revision 1.07
0
0