pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 226
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Embedded Controller Modules
Program a Page in the Information Block
The program operation enables changing bits with a value of 1 to 0. Each byte address of the Information Block may be
programed once before being erased. If required, perform an erase operation prior to the program operation.
To program a word using the JTAG interface, see Section 4.19.4 on page 251.
4.16.5 Parallel Flash Interface
The Parallel Flash interface used in PROG environment allows the PC87591x to be tested and programed quickly with Au-
tomated Test Equipment (ATE) and programers in the OEM’s manufacturing flow.
For details about this interface, contact a National Semiconductor sales representative.
4.16.6 Flash Protection
The Main Block can be accessed by the core, host, JTAG interface and Parallel interface. The Information Block may be
accessed by the core, JTAG interface and Parallel interface. A protection mechanism that combines hardware and software
controlled elements is provided. The protection level depends on the access path used and the contents of the ‘protection
word’.
Protection Word
The protection word is stored in address 0FE
Bit
Name
3-0
Bit
4
Core Boot Block. Defines the size of the Core Boot Block
The boot block starts at address 00 0000 and ends at the address specified by this field.
Bits
3 2 1 0 Description
1 1 1 1: Flash is erased. When in IRE and OBD environments, the core is kept in reset (default).
1 1 1 0: 4K
1 1 0 1: 8K
1 1 0 0: 16K
1 0 1 1: 24K
1 0 1 0: 32K
1 0 0 1: 40K
1 0 0 0: 48K
0 1 1 1: 56K
0 1 1 0: 80K
0 1 0 1: 96K
0 1 0 0: 112K
0 0 1 1: 128K
Other:
Host Boot Block. Defines the use and the size of a Host Boot Block area. The Host Boot Block is always at
the end of the on-chip flash memory. Protection is provided by the Shared Memory function.
0: A 64 Kbyte Host Boot Block is specified
1: No Host Boot Block is available (default)
Res RST2EN
15
Reserved
14
13
12
Reserved
11
10
(Continued)
16
Flash Contents
in the flash Information Block. It is constructed as follows:
9
Protect
8
Description
226
7
MBTA
Force
Zero
6
RTC Lock
Default
5
Host Boot
Block
4
3
Core Boot Block
1
2
1
Revision 1.07
0
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